“Switching
Techniques” provide you with a deeper view of: what is Switch and Switching, what are the different types of switching
available, their advantages and disadvantages. This report contains theory related to switching
along with illustrated diagrams; those diagrams will help you to clearly
understand and differentiate between various switching techniques
we
are provided with a little time to complete this report and we have just studied
this course is also a matter of fact. Despite of all these reasons we have
tried our level best to prepare this report in such fashion; that it become
more comprehend and easily understandable to all of those who utilize this
report.
Authors
Aims and
objectives:
To
define the switching, its structure, basic elements and functionality.
We have a problem to connect multiple devices to make one to one
communication possible (each device must connect with every other device
attached). Solution is to install either mesh topology (point to point
connection between each pair of devices) or use star topology (use a central
device for that purpose). These techniques are impractical or wasteful when
applied to very large network. The no. and length of links require too much
infrastructure and majority of those links would be idle for most of the time.
Consider a network having six
devices A, B, C, D, E, and F. if device A has a point to point links to devices
B, C, D, E, and F then whenever only A and B are connected, the links
connecting A to each of other devices are idle and wasted.
Multipoint
connection topology such Bus is also rolled out because the distance between
devices and total no. of devices increase beyond capacities of media and
equipment.
For
all of the above stated problems the better solution recommended is use of
switch called switching. A switched network consists of a series of interlinked
nodes called switches. Switches are hardware and/or software devices capable of
creating temporary connections between two or more devices linked to the switch
but not to each other. In a switched network some of these nodes are connected
to the communication devices. Other are used only for routing. The
communicating devices are labeled A, B, C, D, and so on and switches I, II,
III, IV and so on. Each switch is connected to multiple links and is used to
complete the connection between them two at a time
The two primary functions a packet switch must
provide are
1.
Routing of cells from the
switch inputs to the correct outputs;
2.
Resolving contention by
means of store-and-forward buffering.
We shall show how the routing function is implemented
for a 2×2 switch, often referred to as a β-element. In a larger switch the
routing function is typically synthesized by a network of β-elements. The
smoothing buffers required for contention resolution are placed within that
network, according to the switch architecture.
The structure of a β-element is depicted in
the diagram.
It consists of decision logic which operates on the
cell headers, a latch to hold the result of that decision for the duration of
the cell, delay lines to synchronize the cell contents with the decision, and
the 2×2 cross-connect itself. The cross-connect is a dual multiplexer which can
be set in either a "bar" or a "cross" state; that is, each input can be routed to either output,
with the other input correspondingly routed to the other output.
The complexity of a β-element depends entirely
on the requirements from its decision-making circuitry. For some switch
architectures, the element state is determined only by the cell activity bit;
for others, the decision may involve as much processing as determining the two
cells' destinations from the virtual circuit numbers in the cell headers,
possibly involving binary lookup tables. Whatever the case, the element is
sufficiently simple so that many can be incorporated into a single VLSI chip.
Broadband interconnection
of networks which carry all types of information depends heavily on the
feasibility of implementing real-time packet switching fabrics. Such switches
route arriving packets on the basis of information contained in each packet
header. Because of the high data rates involved, routing decision-making logic
must be implemented entirely in hardware; software processing would be grossly
incapable of keeping pace with the high rate of packet arrivals. The
implementation normally requires custom-design VLSI circuitry to maintain
physical compactness.
In discussing packet switch
interconnections, we shall henceforth assume that the arriving packets are of
fixed time length. Such fixed-length packets are also referred to as cells.
Two primary functions are
supported by the N-input, N-output switch (subsequently referred to as an N×N switch): (1) routing of each
applied fixed-length cell to its correct destination port, and (2) resolving
the contention which arises when several simultaneously arriving cells are
headed to a common output port. We are implicitly assuming that the destination
port number is included in the cell header. In reality, a cell header usually
contains more high-level information, such as a virtual path number and/or a
virtual connection number; the relation between these numbers and the switch
ports is determined during the call setup phase.
Since packet switching is
involved, output port contention is resolved by means of store-and-forward
buffering: arriving packets which cannot be immediately delivered because of a
contention are stored in a buffer (or buffers) within the switch, their
delivery being deferred according to a buffer servicing discipline. The purpose
of the buffers is to smooth out the statistical fluctuation in the arrival
patterns, so that even in a case of a peak cell arrival rate followed by a
quiet period, the output is a smooth continuum of cells. The various switch
architectures are differentiated primarily by their buffer servicing policies.
Aims and
objectives:
To
briefly describe the techniques of switching.
Switching Methods
Three important methods of switching are: circuit switching, packet
switching, and message switching.
Aims and
objectives:
To
describe the circuit switching techniques, space division and time division
switches.
Circuit switching
It creates a direct physical connection between two devices such as
phones and computers. For example instead of point to point connections between
the three computers on the left (A, B, and C) to the four computers on right
(D, E, F, and G) requiring 12 links, we can use 4 switches to reduce the no.
and total length of the links.
In circuit switching, dedicated physical connection is established
between the sender and receiver and maintain for entire conversation. For
example a PSTN uses a circuit switching, when you make a call a physical link
between the two lines is dedicated during entire conversation. When one phone
hangs up, the connection is terminated and circuit is released. A computer
network performs circuit switching in same way. Before any two computers can
transfer data, a dedicated circuit must be established between the two. The
sending machine request the connection to the destination, after which the
destination machine signals that it is ready to accept data. The data is then
sent from source to destination, and destination sends acknowledgements back to
source. When the conversation ends source sends a signal to the destination,
indicating that connection is no longer needed, and disconnects itself.
A
circuit is a device with n inputs and m outputs that creates a temporary connection
between an input link and an output link. The number of inputs does not have to
match the number of outputs.
A circuit switch
An nxn folded switch can connect n lines in full duplex mode for
example it can connect n telephone in such a way that each phone can connected
to every other telephone.
Advantages
The major advantage of circuit switching is that the dedicated
transmission channel the machine establishes provides a guaranteed data rate.
This is important for time critical applications as audio and video. Also, once
circuit is established, there is virtually no channel access delay, since the
channel is always available, it does not need to request again.
Disadvantages
Circuit switching has its
disadvantages. One is that it is often an un-efficient use of transmission
medium. Because the connection is dedicated even when it is idle, no other
device can use that channel. Dedicated channels require more bandwidth then non
dedicated channels, so transmission media can be expensive.
Circuit switching today can use either of two technologies i.e. space
division switches and time division switches.
Space Division Switches
The
Space division switching technology is originally designed for analog network
as we previously have discussed a PSTN. Now days it is used for both digital
and analog networks. In space division switching paths in circuit are separate
by use of space (Spatial separation).
Crossbar Switches
A crossbar switches based
on the number of cross points it can connects n inputs to m outputs in a grid,
using electronic micro switches (transistor) at each cross point.
The major limitation of this design is the number of cross points
required. Connecting n inputs to m outputs using a crossbar switch requires n x
m cross points. If to connect 100 inputs to 1000 outputs requires a crossbar
with 100,000 cross points. This factor makes the crossbar impartial because it
makes the size of the crossbar huge. Such a switch is also inefficient because
statistics show that, in practical, fewer than 25% of the cross points are in
use at a given time. The rest are idle.
Multistage Switches
The problem with crossbar switch is of the cross points as the input and
output devices attached, and if the input and out point device increases the
cross points also increased
And very fewer cross points are in use and the rest are idle, so for
the solution of this limitation of the cross bar switch is to use multistage
switches, which combine crossbar switches in such away that there are several
stages becomes. In multistage switching, device are linked to switches that, in
turn, are linked to a hierarchy of
Other switches
The design of a multistage depends on the number of stages and the
number of switches required (or desired) in each stage. Normally, the middle
stages have fewer switches than do the first and last stages.
Suppose we want a multistage switch of making the 15-by-15 crossbar
switch. Assume that we have decided on three-stage design that uses three
switches in the first and final stages and two switches in the middle stage.
Because there are three of them, each of the first stage switched has inputs
fro one-third of the input devices, giving them five each (5X3=15).
Here each of the first-stage
switches must have an output to each of the intermediate switches. There are
two intermediate switches; therefore, each first-stage switch has two outputs.
Each third-stage switch must have from each of the intermediate switches; two
intermediate switches mean two inputs. The intermediate switches must be
connect to the three switches of the first-stage and also with the three
switches of the final-stage, by this way there must be three inputs and also
three outputs each.
Multiple paths
Multistage switches provide several options for connecting each pair of
linked devices, for two ways traffic can move from an input to an output using
the switch designed in the given example above
A pathway is stabled between input line 4 and output line 9.In this
instance, the path uses the lower intermediate switch and that switch’s center
output line to reach the last-stages connected to Line 9.
In the Second form as above shown that a path way between the same input
line 4 and the same output line 9 using the upper intermediate switch .Here the
number of cross points in a 15-by-15 single-stage crossbar switches with the
15-by-15 multistage switch that we already discussed in above example. In the
single-stage switch, we need (15 x 15) 225 Cross points. In the multistage
switch, we need
1.
Three
first-stage switches, each with 10 cross points (5x2), for a total of 30 cross
points at the first stage.
2.
Two
second-stage switches, each with 9 cross points (3x3), for a total of 18 cross
points at the second stage.
3.
Three
third-stage switches, each with 10 cross points (5x2), for a total of 30 cross
points at the last stage.
The total number of cross points
required by our multistage switch is (30+18+30) 78. In this example, the
multistage switch requires only 35% as many cross points s the single-stage
switch.
The major problem with the crossbar
switching is number of cross points as the input and output devices are
increased but
The reduction in the number of cross
points results in a phenomenon called Blocking during period of heavy traffic.
BLOCKING
Blocking refers to times when
one input cannot be connected to an output because there is no path available
between them-all of the possible intermediate switches are occupied.
The advantage of single-stage is that in the single-stage switch
blocking does not occur. Because every combination of input and output has its
own cross points, there is always a path. (Suppose in the situation of two inputs
trying to communicate the same output don’t count. that path is not blocked;
the output is merely busy)
But in case of multistage
switch as already described in the above example, However, Only two of the
first five inputs can use the switch at a time, only two of the second five inputs
can use the switch at a time, and so on the.
Small number of outputs at the middle stage further increases the
restriction on the number of available links.
In a very large system, suppose
10,000 inputs and outputs, the number of stages can increase to cut down the
number of cross points required. As the number of stages increases, however,
possible blocking increases as well. As a common example many people having
experienced blocking on the public telephone system in the wake of natural
disaster when calls being to check on or reassure relatives far outnumber the
ordinary load of the system. In those cases, it is about impossible to
communicate. Under normal circumstances, however, blocking is not usually a
problem. In countries that can afford it, the number of switches between lines
is calculated to make blocking unlikely. The formula for finding this number is
based on statistical analysis.
Time-Division Switches
Time division switching is an other most
popular technique in switching, that is achieved by time division Multiplexing.
There are two popular methods used in time-division Multiplexing: the time-slot
interchange and the TDM bus.
Time-slot Interchange (TSI)
Suppose a system connecting four input lines to four output lines.
Imagine that each input lines wants to send data to an output lines with their
respective devices
1 3
2 4 3
1 4 2
Data are output in the same
order as they are input. Data from 1 go 1, from 2 go to 2, from 3 go to 3, and
from 4 go to 4. We insert a device called a time-slot interchange (TSI) into
the link. A TSI change the ordering of the slots based on the desired
connections. In this case, it changes the order of data from A, B, C, D to C,
D, A, B. Now,
When the demultiplexer separates the slots, it passes them to the
proper outputs.
A TSI consists of random access memory (RAM) with several memory
locations. The size of each location is the same as the size of a single time
slot. The number of locations is the same as the number of inputs (in most
cases, the number of inputs and outputs are equal). The RAM fills up with
incoming data from time slots in the order received. Slot are then sent out in
an order based on the decisions of a control unit.
TDM bus
The input and output lines
are connected to a high speed bus though input output gates(micro switches).
Each input gate is closed during one of the four times slot. During the same
time slots only one output gate is also closed. The pair of gates allows a
burst of data to be transferred from one specific input line to one specific
output line using the bus. The control unit open and close the gates according
to switching need. For example in the figure at first time slot the input gate
1 and output gate three 3 will be closed. During the second time slot, input
gate 2 and output gate 4 will be closed and so on. A folded TDM bus can be made
with duplex lines (input and output) and dual gates.
Aims and
objectives:
To
define the message switching technique .
MESSAGE SWITCHING
Message switching is best
known by the descriptive term store and
forward. Message switching is unlike
circuit switching in that it does not establish a dedicate path between two
communication devices. Instead, each message is treated as an independent unit
and includes its own destination and source address. Each complete message is
then transmitted from device through the internetworks. Each intermediate
device receives the message, store it until the next device is ready to receive
it, and then forward it to next device. For this reason, a message switching
network is sometimes refer to as store
and forward network. In message switching message are stored and relayed from
secondary switches(disk), while in packet switching the packets are stored and
forward from primary storage(RAM).
Message switches can be programmed with information about the most
efficient routes, as well as information regarding neighboring switches that
can be used to forward message to their ultimate destination. Because of this
information and varying conditions of network, message switching system
typically route message through network along varying paths.
One example of store and
forward system is email. An email message is forwarded as complete unit from
server to server until it reaches its correct destination.
ADVANTAGES
Advantages of message
switching includes following:
·
It provides efficient
traffic management. By assigning priorities to the message to be switched, you
can ensure that high priority message get through in timely fashion, rather
then being delayed by general traffic.
·
It reduces network traffic
congestion. The intermediate devices (the message switches) are able to store
message until a communication channel become available, rather then choking the
network by trying to transmit every thing in real time.
·
Its uses of data channels
is more efficient then that of circuit switching. With message switching the
network device share the data channel, this increase the efficiency because
more of the available bandwidth can be used.
·
It provides asynchronous
communication across time zones.
DISADVANTAGES
On the other hand, the
delay introduced by storing and forwarding complete message makes the message
switching unsuitable for real time applications such as audio and video. For
these applications especially video conferencing you required circuit
switching. Another disadvantage of message switching is that it can be costly
enough to equip intermediate devices with enough storage capacity to store
potentially long messages.
Aims and
objectives:
To
define the packet switching technique and its further types.
Packet Switching
Circuit switching was design for voice communication. For
example in a telephone conversation once a connection is established it remains
established for the entire conversation. Circuit switching creates a temporary
or permanent dedicated links that are appropriate for this type of
communication. Circuit switching is not well suited for data and other non
voice transmission. Non-voice transmission tend to be bursty, means data come
in sudden streams with idle gaps between them. When circuit switched links are
used for data transmission, the line is often idle and its facilities wasted.
Second
weakness of circuit switched link for data transmission is in its data rate. A
circuit switched link creates the equivalent of single cable two devices and
assume a single data rate for both devices. That limits the flexibility and
usefulness of circuit switched connection for networks interconnecting a
variety of digital devices.
Third,
the circuit switching is inflexible. Once a circuit has been established, that
circuit is the path taken by all parts of transmission. Whether or not it
remains the most efficient or available.
Finally, we can not prioritize the data.
Circuit switching sees all transmissions as equal. A better solution for data
transmission is packet switching. Packet
switching provides the advantages of both circuit switching and message
switching and avoids the main disadvantages of both. In packet switching,
messages are broken into packets, each of which includes a header with source
destination and intermediate node information. Individual packets may not
always follow the same route; this is called independent routing. Independent
routing offers two advantages:
·
Bandwidth can be managed by
splitting data onto different routes in a busy circuit.
·
If a certain link in
network goes down during transmission, the remaining packet can be sent through
different route.
The main difference in packet and
message switching is that the packet switching restricts the packets to a
maximum length. This length is short enough to allow the switching devices to
store the packet data in memory without writing it to disk. Packet switching
works more efficiently then message switching.
Two
popular approaches to packet switching are: datagram and virtual circuit.
In the datagram service, each packet entering the
network is treated as a self contained entity with no relationship to other
packets. Each packet is received and forwarded in the way just outlined. This
service is used for the transfer of short, single packet messages.
For a message containing multiple packets a virtual
call service is normally selected. Before any information associated with a
call is sent, the source DTE sends a special call request packet to its local PSE
containing, in addition to its required physical destination the DTE network address, a reference number called the virtual
circuit identifier (VCI). This is noted by the PSE and the packet is
forwarded through the network as before. At the destination PSE, a second VCI
is assigned to the call request before it is forwarded to the destination DTE. Then, assuming the call is accepted, an appropriate
response packet is returned to the calling DTE. At this point, a virtual circuit is said to exist
between the two DTEs. The information transfer phase is
then entered and all subsequent data packets relating to this call are assigned
the same VCI numbers on each interface link to the network. In this way, both
source and destination DTEs can readily distinguish between packets arriving on
the same link but related to different calls. This might appear similar to a
connection established through a circuit switched network but it's purely a
logical connection. The class of the service supported by the virtual circuit
is very high, since error and flow control are provided at the packet level.
Normally, a virtual circuit is cleared at the end
of the call. However, it is possible for the virtual circuit to be left
permanently established, so that a user who needs to communicate frequently
with another user doesn't have to set up a virtual circuit for each call. This
is known as a permanent virtual circuit. The user is charged for this
facility and for the quantity of the data transferred.
DATAGRAM
APPROACH
In datagram approach to
packet switching, each packet is treated independently from all others. Even
when one packet represents just one piece of multipacket transmission, the
network treat it as it is existed alone. Packets in this technology are
referred as datagrams.
Figure shows
how datagram approach can be used to deliver four packets from station A to
station X. In this example, all four packets (or datagrams) belongs to same
message but may go by different paths to reach its destination
This
approach can cause the datagrams of a transmission to arrive at their
destination out of order. It is the responsibility of transport layer in most
protocols to reorder the datagrams before passing them on destination port.
The
link joining each pair of nodes can contain multiple channels. Each of these
channels is capable, in turn, of carrying datagrams either from several
different sources or from one source. Multiplexing can be done using TDM or FDM
In above figures,
devices A and B are sending dataqgrams to devices X and Y. Some is carrying two
packets from different sources in same direction. The link on the right,
however. Is carrying datagrams in two directions.
VIRTUAL
CIRCUIT APPROACH
In
a virtual circuit approach to packet switching the relationship between all
packets belonging to a message or session is preserved. A single route is
chosen between sender and receiver at the beginning of session. When the data
are sent, all packets of the transmission travel one after another along that
route.
Virtual circuit
transmission is implemented in two formats: switched virtual circuit (svc) and
permanent virtual circuit (pvc).
Switched Virtual Circuit (SVS)
The switched virtual circuit format is comparable conceptually
to dialup lines in circuit switching. In this method, a virtual circuit is
created whenever it’s needed and exists only for the duration of the specific
exchange. For example, imagine station A wants to send four packets to station
X. first, a request the establishment of connection to X. once the connection
is in place, the packets are send one after another and in sequential order.
When the last packet has
been received and, if necessary, acknowledged, the connection is released and
virtual circuit ceases to exist.
Only one single route
exists for the duration of transmission, although the network could pick an
alternative route in response to failure or congestion. Each time that A wishes
to communicate with X, a new route is established. The route may be the same
each time or it may differ in response to varying network conditions.
PVC-PERMANENT VIRTUAL CIRCUITS
PVC are comparable to
leased lines in circuit switching. In this method the same virtual circuit is
provided between two users on continuous basis. This circuit is dedicated
to specific users. No one else can use
it and, because it’s always in place, it can be used without connection establishment
and connection termination. Where as two SVC users may get a different loop
every time they request a connection, two PVC users always get the same loop.
A
Public Data Network (PDN) is a network established and operated by a national
administration authority specifically for transmission of data.
There
are two main types of PDN: packet switched and circuit
switched. Let us first outline the differences between the two types of
these networks.
In
a circuit switched data network each connection established results in a
physical communication channel being setup through the network from the calling
to the called subscriber equipment. This connection is then used exclusively by
the two subscribers for the duration of the call. The main feature of such a
connection is that it provides a fixed data rate channel, and both subscribers
must operate at this rate.
In
packet switched data networks all data to be transmitted is first assembled
into one or more message units, called packets, by the source DTE. These packets
include both the source and the destination DTE network
addresses. They are then passed by the source DTE to its local
Packet Switching Exchange (PSE). On receipt of each packet, the PSE inspects
the destination address contained in the packet. Each PSE contains a routing
directory specifying the outgoing links to be used for each network address. On
receipt of each packet, the PSE forwards the packet on the appropriate link at
the maximum available bit rate. As each packet is received at each intermediate
PSE along the route, it is forwarded on the appropriate link interspersed with
other packets being forwarded on that link. At the destination PSE, determined
by the destination address within the packet, the packet is finally passed to
the destination DTE.
To
prevent unpredictably long delays and ensure that the network has a reliably
fast transit time, a maximum length is allowed for each packet. It is for this
reason that a message submitted to the transport
layer within the DTE
may first have to be divided by the transport
protocol entity into a number of smaller packet units before transmission. In
turn, they will be reassembled into a single message at the destination DTE.
In
packet switched data networks error and flow control
procedures are applied on each link by the network PSEs. Consequently, the
class of service provided by a packet switched network is much higher than
provided by a circuit switched network.
Aims and
objectives:
Case
discussion of ATM switching and other new advents in switching techniques and
refrences.
The following document is
an introduction to switching on ATM networks. The
document includes a general introduction to the ATM switch element, its
requirements and performance issues. Several queueing methods, which aim to
allow the switch to achieve the requirements are discussed. The Knockout switch
element is introduced as an example of switch element architecture.
The bandwidth requirements
for data traffic within commercial organizations have been increasing steadily
for some time, both in the local area networks and in the wide area networks.
Workstations have been used to introduce multimedia applications to the desktop,
including components of voice, video and image,
besides growing amounts of data. This development requires networks of greater
bandwidth than commonly present today with the capability of handling
multiservice traffic on the same network.
The asynchronous transfer
mode (ATM) is being developed as a high speed networking technique for public
networks capable of supporting many classes of traffic. ATM also uses the
advantage of the new VLSI and fiber optic techniques recently developed.
ATM is a high-speed,
packet-switching technique that uses short fixed length packets called cells.
Fixed length cells simplify the design of an ATM switch at the high switching
speeds involved. The selection of a short fixed length cell reduces the delay
and most significantly the jitter (variance of delay) for delay-sensitive
services such as voice and video. ATM is capable of supporting a wide range of
traffic types such as voice, video, image and various data traffic.
In the following document I
will introduce the basis of switching requirements in ATM broadband networks
and introduce ATM switching solutions.
Various switching
architectures were developed in the past for different application such as
voice and data, based on modes like STM (Synchronous Transfer Mode) and packet
switching.
The switching architectures
that were previously developed for STM and for conventional packet switching
like X.25 are not directly applicable for broadband ATM.
Three major factors have a
large impact on the implementation of the ATM switching architecture:
The ATM cell has a fixed
length (of 48 bytes) payload and a fixed length header (5 bytes) with limited
header functionality allow to implementation of different optimal switching
architectures, queueing
functions for example. Some of the switching techniques have been realized,
or are in stage of implementation.
A growing number of ATM
switches are commercially available and installed by public operations to offer
a public, wide are a broadband service, sometimes called ATM Central Office.
Other switches are deployed by private users and are used in an internal high
speed telecommunication needs, often called ATM LAN.
In the description of ATM
switching in the following introduction the attention will be paid to the
"transport" part of the switch and not to the "control"
part.
The transport network is
defined as all the physical means which are responsible to the current
transportation of the information from the ATM inlet to the ATM outlet. The
transport network in the ATM network mainly performs functions located in the
user plan of the ATM protocol reference model.
The control part of the
switch is that which controls the transport network. It decide for instance, which
inlet to connect to which outlet. The decision is based on incoming signaling
information. The control network mainly performs functions located in the
control plane of the ATM protocol reference model. The qulity of service
parameters for the transport network are the cell loss rate, the error
rate, cell delay and cell jitter .
ATM is connection oriented.
All cells belong to a virtual connection pre-established by the transport
network . All traffic is segmented into cells for transmission across the
network. The sequence integrity of all the cells in the virtual connection is
preserved across each ATM switch to simplify reconstruction of the original
traffic at the destination (allows smaller total delay on the net). The ATM
cell is 53 bytes long, built of 48 payload bytes and a 5 bytes header. Each
cell's header contain a VCI (virtual
channel identifier) that identifies the virtual connection to which the cell
belongs.
The ATM switch has several
main tasks:
VCI
translation.
The established connection on the ATM network defines the
virtual path through different switches across the network. The VCI is local to
each switch port. As each cell travels across an ATM switch, the VCI is
translated into a new value. The switch has to built the new cell header
containing the new VCI (and possibly new VPI - virtual
path identifier ) and calculate the new HEC value.
Switching -
Cell transport from its input to its output.
The transportation of the information (cell) from an incoming
logical ATM channel (inlet) to an outgoing logical ATM channel (outlet), is
also the responsibility of the ATM switch. The logical ATM channel is
characterized by two identifiers:
1. The physical inlet/outlet which is characterized by a
physical port number.
2. The logical channel on the physical port which is
identified by the VCI and/or the VPI.
In order to
provide the switching function, both physical and logical identifiers of the
incoming cell have to be related to physical and logical identifiers of the
outgoing cell. Two functions have to be implemented in the ATM switching
system.
The first
function is the space switching function. The space switching function is the
one which allows the connection between every input and every output. An
important aspect of space switching is the internal routing. This means how the
information is routed internally in the switch. The internal structure
of the switch must allow connections between every input to every output.
The second
function is time switching. Since ATM is working in an asynchronous mode, cells
which had arrived in various time slots from the different inputs can be
delivered from different outputs in different time slots (there is no time
identifier in ATM as it is in STM). Since there is no pre-assigned time slot
connection, a contention
problem arises if more than two logical channels are connected to the same
output at the same time slot. This problem in the ATM switch is solved by
implementing a queueing function
in the ATM switch system.
In this work the functions
of routing and queueing will be discussed in more detail.
The ATM switch has to
handle a minimum of several hundred thousand cells in a second at every switch
port. A switch has to connect from a few ports to thousands of ports. In
principle, a switch fabric can be implemented by a single switching element.
But from practical reasons the switch fabric has to be built of basic switching
building blocks - switching
elements .
A switching element is the basic unit of the switch fabric. It
can be implemented in a single integrated circuit element. At the input port
(inlet) the routing information of the incoming cell is analyzed and the cell
is then directed to the correct output port (outlet). In general the switching
element consists of an interconnection network , and IC (input
controller) for each incoming line and an OC (output controller) for
each outgoing line. Arriving cells will be synchronized to the internal clock
by the IC. The OC transport cells which have been received from the
interconnection network toward the destination. The IC and OC are coupled by
the interconnection network.
There are several switch
element requirements to perform the switch
functionality . A general structure of a switching element is in the figure below :
General model of switching element
An ATM network has to
support a wide range of applications using various kinds of information in, a
wide range of speeds from telecontrol to high quality video. These services
define different requirements in terms of bit rate, behavior in time (constant
bit rate or variable bit rate), semantic transparency (cell loss rate, bit
error rate) and time transmission (over all delay, jitter). The ATM switch
architectures have to be considered in these requirements.
Since ATM is defined to be
connection oriented, after connection set-up a logical connection must
be found between the logical inlet and the logical outlet.
Connection blocking is
defined as the probability that not enough resources can be found to allow all
the required physical connections between inlets and outlets at any time.
In an ATM switch it is
possible that temporarily too many cells in the switch have to be transmitted
through the same link (switch internal or external link). In optimal
operational conditions there is an available entry in a queue to hold all the
cells. But if the queue is currently full, another cell that will require the
same queue will be lost.
The probability of a cell
lost mast be kept in a specified limits to assure high semantic transparency.
Typical values for cell loss in ATM are in the range of 10^(-8) to 10^(-10).
Some switching
architectures are designed such that they will not suffer from cells competing
for the same resources internally, but only at their inlets and/or outlets.
It is also possible that
from some internal routing error a cell will be sent to the wrong logical
connection. If such an error occurs, error impact is doubled by the fact that
one destination will miss a cell and that a second destination will accept an
additional cell. The switch element has to be designed so that cell insertion
error probability will be about 1000 times better than a cell loss.
To allow support of different
real time services in an ATM network, a maximal delay has to be guaranteed and
a low values of jitter.
Typical delay values are
between 10 and 1000 usec, with jitter of 100 nsec or less. The delay and the
jitter in the cell are strongly related to the queueing in the switching
element. A small queue will assure better delays but will increase the cell
loss probability.
A large number of
information rates have to be switched in the same ATM switch. The maximal bit
rate which a future ATM switch has to be able to switch lies around 150
Mbit/sec. For such fast services, the switching element can be implemented as
several switching elements in parallel. Or, several 150Mbit/sec switching
elements can be multiplexed on a single link. That will require a switching
rate in the order of Gbit/sec.
In classical connection
oriented packet switching services, only point to point connections are
available, because the information (cell) can be switched from one logical
inlet to one logical outlet only. In future broadband networks broadcast and
multicast services are required for different applications from electronic-mail
to network TV services.
There are many queueing
problems in an ATM switch because actually the ATM switch performs statistical
multiplexing in the switch inputs and de-multiplexing in the switch outputs.
Suppose two ATM cells arrived at two inlets at the same time and are aiming for
the same outlet. Some arbitration mechanism and queue of waiting cells has to
be implemented in the switch. There are several queueing possibilities. It is
possible to add a queue at the switch element inputs, add a queue at the switch
output, or add a queue between the inputs on the outputs of the switch.
The different possibilities
are described briefly.
In this configuration the
buffers are located at the input controller (IC). When using a first-in-first-out
(FIFO) buffer, a collision occurs if two or more head-of-the-queue cells
compete simultaneously for the same output. Then all but one of the cells are
blocked. The cells behind the blocking head-of-the-queue cell are also blocked
even if they are destined for another available (currently not in use) output.
In this method the switch interconnection network will transfer the the cell
from the input buffer to the output buffer without internal conditions.
Arbitration logic is needed to determine which of the cells held in different
inlet buffers destined to the same output will be transferred in the
interconnection network. The arbitration logic can be from very simple logic
(e.g. simple round robin) to more complex arbitration methods (aiming to keep the
same queue length in all the buffers).
To overcome this
disadvantage, the FIFO buffer can be replaced by a random access memory (RAM).
If the first cell in the queue is blocked, the next cell which is destined for
an idle output (or internal switch interconnection network link) will be
selected for transmission. The disadvantage of this solution is that a complex
buffering control is required to find a cell destined to an idle connection and
also to guarantee a correct cell sequence of cells destined for the same
output.
The input buffer approach
achieves the worst performance in the sense of the queue length required to
achieve a given cell-loss rate in various switch loads in comparison to the
other two queueing methods.
Input Buffering.
In this technique, the
buffers are located at the OC of the switch element. The assumption is that
many cells from the IC can cross the internal interconnection network and
arrive to the outlets. This solution requires use of a very fast internal pass.
In order to allow a non-blocking switch, the interconnection network and the
output buffer have to be capable of handling N cells at one cell time (when N
in the number of ICs).
When output buffers are in
use, no arbitration has to be used. The control of the output is based on a
simple FIFO logic.
Output Buffers.
In the central queueing
approach, the queueing buffers are not dedicated to a single inlet (as in the
input buffer approach) or to a single outlet (as in the output buffer
approach), but shared between all inlets and outlets. Each coming cell
will be directly stored in the central storing element. Every outlet will
identify the cells destined to it in a FIFO discipline.
From the queueing point of
view, this method is the most efficient and required the smallest total storage
to allow minimal cell loss in heavy load conditions. Since the available memory
on an integrated circuit switching element is limited, it is possible to
achieve low cell-loss probabilities when using the central queueing approach.
The disadvantages of this
approach are that very fast memory elements are required to allow all the
coming cells and outgoing cells access to the memory ports at the same time,
and big complexity in the queue management.
The realization of the
three queueing approaches (
input buffer, output
buffer, central
queueing ) are very different. The differences are in three main aspects:
queue size
The size of the queue depends on the performance requirements
of the system (cell loss ratio, load, delay) and the queueing method in use.
The queue size is reflected in the number of cell buffers which are supported
by the switching element.
memory speed
The access time of the queueing element depends on the queueing
method in use, the number of inlets and the number of outlets of the switching
element and the rate of the incoming and out going cells.
memory
control
In order to control the queues of the switching element,
additional control logic is required.
The following paragraphs
describe the general structure of the Knockout switching element. The Knockout
switch was first introduced by Yeh in 1987. The Knockout switch can grow to a
large size by composing small entities, to create bigger switching element or
as a switching fabric.
The Knockout switch is
based on a the output buffering (queueing) approach. As mentioned before one of
the disadvantages of the output queueing methods is the fast memory access
required to achieve a small cell loss rate. The Knockout is trying to overcome
this disadvantage.
The Knockout switch has N
inlets and N outlets. The interconnection network is a matrix type. N broadcast
buses, one of each inlet, connects to each of the inlets. Each outlet is
connected to all inlets via a bus interface of N inputs, connected to each
individual broadcast bus. This means that the interconnection network is
non-blocking, and at the input of the bus interface there is no cell loss.
Knockout Switching Element
The bus structure has the
major advantage that each bus is driven by only one inlet. This structure
allows simple implementation and high bandwidths on the interconnection
network.
At a bus interface, several
cells may arrive simultaneously. All can (in the worst case) be destined to a
single output. Therefore, the bus interface requires some kind of queueing.
Since N cells can be destined to a bus interface at one cell time, the bus
interface has to use very fast memory elements to guarantee zero cell loss. In
order to simplify the implementation and reduce the required memory operation
speed, a non-zero loss method is implemented. The is switch realized as an
intelligent bus interface , which acts as a concentrator , with a
non-zero cell loss probability.
At the top of the bus
interface N filters are located, each one of them connected to one of the N
inlet broadcast buses. The cell filters examine the address of the incoming
cells. If the cell is destined to the outlet related to the bus interface the
cell is passed to the concentrator .
The next part after the bus
interface is the concentrator , which concentrates N inputs to L outputs
(where L<= N). If in the same cell time, k cells are destined to the same
outlet and k>L , a (L-k) cells will be lost in the concentrator . The
concentrator itself is built of very simple building blocks. Those biulding
blocks are basically a switch in which 2 inputs contend for a winner output. If
only one cell is present at the input at a time, it will be selected as a
winner output. If two cells are present at a time in the inputs, one cell is
selected as a winner and the second one, the loser, it transferred to contend
on the next stage.
The probability of losing a
cell in the concentrator must not be larger than the probability of
losing cells elsewhere in the switch element. Statistical calculations show
that if L=12, a cell loss probability of 10^(-10) can be achieved for any load
and any value of N.
The next stage in the
Knockout switch is the output buffers . L dual port buffers are
connected to the L concentrator outputs. In order to distribute the load on the
output FIFOs (and reducing the total amount of memory required for each bus
interface) a sifter stage is provide. The shifter guarantee that
all L buffers are equally (uniformly) loaded and optimally used.
1. Data
Communications, Computer Networks and OSI / F.Halsall
2.Computer Network / A.S.Tanenbaum
3.Data Network / U.D.Black
Reference books
1. MCSE: Networking Essentials
2. Data communications and Networking By: Behrouz A.. Forouzan.
3. ATM and Multiprotocol Networking (McGraw
Hill Text) –
4.
Building Switched Networks: Multilayer Switching, QoS, IP Multicast, Network Policy, and Service Level Agreements
(Addison-Wesley Publishing Company)
5. The Switch Book: The Complete Guide to LAN Switching Technology (John
Wiley & Sons) –
Reference
sites
1.
www.ITToolKit.com
2. www.2rad.com
3.
www.interhack.com
4.
www.lucent.com